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EU FP6 Projects on Memory Technologies

 

VERSATILE

The use of three dimensional structures for the realization of non-volatile-memories requires that bit storage and selection elements can be stacked up vertically and should therefore be both manufactured in the Back End Of the Line. Silicon is not well suited as a back end semiconductor material, because the high thermal budget required for both deposition and dopant activation, makes its integration with most of the bit storage elements materials impossible. In this project the junction made of II-VI and organic/polymeric semiconductors will be integrated into cross-bar type memories to obtain a scalable cross-bar non volatile memory with both bit storage and selection elements vertically stacked on top of the other.

 

Abstract

TIn this project we will integrate junction made of II-VI and organic/polymeric semiconductors into cross-bar type memories to obtain a scalable cross-bar non volatile memory with both bit storage and selection elements vertically stacked on top of the other. The junction material should require a low thermal budget for its preparation to be compatible with the most promising technologies for the bit storage element, such as chalcogenides.

 

Download Project brochure here

 

Coordinator: CONSIGLIO NAZIONALE DELLE RICERCHE, Italy

Partners:TECHNISCHE UNIVERSITAET MUENCHEN, Germany; DANMARKS TEKNISKE UNIVERSITET, Denmark; INSTYTUT FIZYKI POLSKIEJ AKADEMII NAUK, Poland; STMICROELECTRONICS, Italy