EU FP6 Projects on Memory Technologies
The FinFlash project aims to study new cell architecture to overcome the scaling limits of Flash memories beyond the 28nm technology node(year 2015 and after). The new idea is to evaluate the potentialities of the FinFET, one of the non-classical advanced MOSFETs that provides a path to CMOS scaling to the end of the RoadMap, for Flash memory application.
Abstract
During the first preliminary evaluations of multi-gate device structural design will be made by advanced 2D/3D TCAD simulations. At the same time, the development of the critical technological modules will be treated. Both deep UV and e-beam lithography will be adopted to realize devices, on Si-bulk and SOI, with minimum size of 25nm x 25nm. A detailed electrical and microstructural evaluation of the devices will be performed. During the second year of the project, a second run of devices will be done, allowing for the evaluation of optimised FinFlash cells and small arrays. The optimised structures will also include new materials for the gate stack like high-k dielectrics and metal gates.
Download Project brochure here
Coordinator: CONSIGLIO NAZIONALE DELLE RECERCHE ISTITUTO PER LA MICROELETTRONICA E MICROSISTEMI (IMM), Italy |
Partners:INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW, Belgium; SILVACO DATA SYSTEMS (EUROPE) LIMITED, UK; COMMISSARIAT A L'ENERGIE ATOMIQUE, France; STMICROELECTRONICS S.R.L., Italy; SILVACO DATA SYSTEMS SARL, France; UNIVERSITA DI PISA, Italy |