EU FP7 Projects on Memory Technologies

GOSSAMER

The project aims at the development of the technology for very high density Non Volatile Memories for mass storage applications down to the 2X nm technology node. The field is receiving increasing attention, due to the explosion of portable multimedia applications, and is forecasted to exceed 40 Billion S$ total available market by 2010. The dominant technology for this application is the floating gate NAND memory. However, severe technological roadblocks (reduction in storage charge and electrostatic interference among neighbouring cells) are limiting further scaling beyond the 32nm node.

Charge trapping in dielectric layers seems to be a viable alternative to floating gate. The main challenge is the integration of the differewnt new materials, like tunnel dielectric, trapping layer, top dielectric, metal gate at the target technology node and the achievement of an acceptable trade-off between functionality and reliability (e.g. charge retention and endurance).

Abstract

The project will cover material development, cell architecture, modelling of material properties, trapping and conduction behaviour in the dielectrics, metal gate materials. Initial studies could be performed on a available technology 65-45nm (more relaxed for Universities and research centres) to arrive to full process integration and realization of full arrays in a technology in the 28-36nm range (the best achievable with available lithography) by two major European semiconductor manufacturers. It will include memory characterization and reliability testing, with the additional aim of defining standards and procedures for reliability assessment.

Download Project brochure here